CableBin

How we work out the answers

The standards table

Every page is generated from one table of facts about each standard: link rates, line coding, connector, power levels, cable ratings and lengths. We wrote it ourselves from the published specifications and the standards bodies' own summaries (USB-IF, Intel, the HDMI Forum and HDMI Licensing Administrator, VESA, Apple), and checked each value by hand. We don't copy text from specifications or other sites. Where we're not yet sure of a detail, the page says "being verified", the detail is listed below, and it's never used in a computed verdict.

The bandwidth formula

A display link has to send every pixel of every frame, plus the blanking interval, a timing gap at the end of each line and frame that the standards still require:

pixel clock = horizontal total × vertical total × refresh rate
data rate = pixel clock × bits per pixel

Bits per pixel are 3 × the bit depth for full colour (RGB or 4:4:4), 2 × for 4:2:2 and 1.5 × for 4:2:0. HDMI 1.4/2.0 always sends 4:2:2 in a 24-bit container.

Which timing

What a link carries

We compare the data rate with each link's usable rate after line coding: 8b/10b keeps 80% (HDMI TMDS, DisplayPort up to 1.4), 16b/18b keeps 88.9% (HDMI 2.1 FRL), and 128b/132b keeps about 97% (DisplayPort 2.1, minus a little for error correction). The full list is on the bandwidth page.

Display Stream Compression

DSC is modelled as compressing up to 3:1, never below 8 bits per pixel, which is the range monitors commonly use for "visually lossless" output. Real products choose their own ratio, and both ends must support DSC. A "With DSC" verdict means the mode fits if they do.

Limits of the model

Validation

Before publishing, we computed these figures with the same code that builds the site and compared them with widely published values. The build stops if any of them drifts.

CaseComputedPublishedCheckReference
1080p 60 Hz, 8-bit (CVT-R2)3.2 Gbps3.2 GbpsExactVESA CVT-R2 data-rate tables (as reproduced in common DisplayPort references)
1080p 60 Hz pixel clock (CTA-861 TV timing)148.5 MHz148.5 MHzExactCTA-861 format 16, 2200 × 1125 total
1440p 144 Hz, 8-bit (CVT-R2)14.08 Gbps14.08 GbpsExactVESA CVT-R2 data-rate tables
4K 60 Hz, 8-bit (CVT-R2)12.54 Gbps12.54 GbpsExactVESA CVT-R2 data-rate tables
4K 60 Hz pixel clock (CTA-861 TV timing)594.0 MHz594.0 MHzExactCTA-861 4K60 format, 4400 × 2250 total; the reason HDMI 2.0 is 18 Gbps (594 × 3 × 10 bits = 17.82)
4K 120 Hz, 8-bit (CVT-R2)25.82 Gbps25.82 GbpsExactVESA CVT-R2 tables; known to just fit DisplayPort 1.4 (25.92)
4K 144 Hz, 10-bit (CVT-R2)39.19 Gbps39.19 GbpsExactVESA CVT-R2 data-rate tables
5K 60 Hz, 8-bit (CVT-R2)22.18 Gbps22.18 GbpsExactVESA CVT-R2 tables; why early 5K monitors needed two DisplayPort 1.2 streams (17.28 each)
8K 60 Hz, 10-bit (CVT-R2)62.06 Gbps62.06 GbpsExactVESA CVT-R2 data-rate tables
Highest 4K 10-bit refresh on DisplayPort 1.4 without DSC97 Hz98 Hz±1First 4K HDR gaming monitors (2018) ran 98 Hz in 10-bit 4:4:4; they used slightly tighter custom blanking than CVT-R2
Highest 4K refresh on two DisplayPort 1.2 lanes (USB-C hubs)30 Hz30 HzExactWidely reported "4K 30 Hz" limit of DP 1.2 USB-C hubs (highest standard rate that fits; the raw maximum is 41 Hz)

Being verified

These details are shown on their pages as provisional until we've checked them against the primary text:

Updates

The site is rebuilt every week, and whenever a standard changes, a new one is published or a reader reports an error. Every verdict on the site is recomputed on each build.